This invention relates generally to enclosures for containing logic elements such as computer cards and for guiding and supporting such logic elements while they are plugged into a backplane or mother board. More specifically, this invention relates to such an enclosure or logic cage to efficiently handle an increased number of logic elements.
As computing system evolution has occurred, there have been increases in computing speed, processing power and optional functions. These changes have necessitated relatively larger and increasing numbers of logic elements (e.g., cards or books) required in central electronic complexes (CECs). There are several resultant problems.
Computing speed is affected to a large extent by the electrical path length between logic elements or cards. As the number of cards increases and as cards have gotten larger, the mechanical pitch or the physical distance between cards has increased. This is due to the increasing size of the cards, but also to the need for additional components such as heat sinks or card covers. The increased mechanical pitch equals increased electrical pitch which causes bus length increases and response time increases.
Secondly, as computing capacity has increased, space has become a premium. A CEC currently needs to be put in smaller, more standard enclosures such as EIA racks. In many instances, the increased card numbers and the larger pitch referred to above exceeds the horizontal space available in typical racks. Consequently, logic cages or the enclosures containing the logic elements must be split and electrically interconnected. Clearly, such "daisy-chaining" of logic cages does nothing to alleviate the electrical path length problem and its manifestations referred to above.
Thirdly, as complexity has increased, hardware costs have increased. This is due to the need for multiple cages, additional backplanes or mother boards, added cable, additional connectors, additional cable shielding, etc.
Because a typical CEC wastes significant space in the rack (it is generally much shorter than the rack is deep), it would seem that an obvious solution would be to place two separate CECs or logic cages back-to-back in a rack. However, to mount two typical CECs back-to-back is not practical because the central area where the mother boards or backplanes reside would not be accessible. Further, the CEC-to-CEC interconnection would not be easily accessible to factory or field personnel. For these reasons multiple CECs or logic cages are typically mounted one on top of the other, but the result is inefficient use of rack space.
There have, of course, been attempts to address these problems in the prior art. U.S. Pat. Nos. 4,530,033; 4,620,265; 3,668,476 and 3,564,112 are directed to enclosures which might be used to contain logic elements. In particular, U.S. Pat. No. 4,530,033 discloses a single circuit card frame which has molded sidewalls and panels having integral joint and lock means for assembling the frame. However, there is no method suggested for connecting two frames or cages together.
Additional U.S. Patents which are representative of prior art enclosures are U.S. Pat. Nos. 4,447,856 and 3,184,645 directed to shelf units or separate housings, respectively, wherein the housings or shelf units may be attached together.